Smart memories polymorphic chip multiprocessor

Ofer Shacham; Zain Asgar; Han Chen; Amin Firoozshahian; Rehan Hameed; Christos Kozyrakis; Wajahat Qadeer; Stephen Richardson; Alex Solomatnikov; Don Stark; Megan Wachs; Mark Horowitz

Smart memories polymorphic chip multiprocessor

Ofer Shacham

Zain Asgar

Han Chen

Amin Firoozshahian

Rehan Hameed Stanford

Christos Kozyrakis Stanford

Wajahat Qadeer

Stephen Richardson

Alex Solomatnikov

Don Stark

Megan Wachs

Mark Horowitz Stanford

Design Automation Conference (DAC), 2009

Abstract

The Stanford Smart Memories polymorphic chip-multiprocessor architecture was conceived as a unified multipurpose hardware architecture base, capable of supporting a variety of programming models and per-application optimizations [17]. Backing the architectural claims, our team of PhD students set out to implement this challenging design in silicon, targeting 90nm technology. Now, with 55M transistors covering 61mm2, this is one of the most complex chips ever fabricated in academia.

Materials

Bibtex

@inproceedings{2009smartmemoriespolymorphicchipmultiprocessor,
  title = {Smart memories polymorphic chip multiprocessor},
  author = {Ofer Shacham and Zain Asgar and Han Chen and Amin Firoozshahian and Rehan Hameed and Christos Kozyrakis and Wajahat Qadeer and Stephen Richardson and Alex Solomatnikov and Don Stark and Megan Wachs and Mark Horowitz},
  booktitle = {Design Automation Conference (DAC)},
  year = {2009},
}

Hi, we are the Stanford MAST team

Smart memories polymorphic chip multiprocessor

Abstract

Materials

Bibtex