Exploiting On-chip Memory Bandwidth in the VIRAM Compiler

David Judd; Katherine Yelick; Christos Kozyrakis; David Martin; David Patterson

doi:10.1007/3-540-44570-6_8

Exploiting On-chip Memory Bandwidth in the VIRAM Compiler

David Judd

Katherine Yelick

Christos Kozyrakis Stanford

David Martin

David Patterson

International Workshop on Intelligent Memory Systems (IMS), 2001

DOI: 10.1007/3-540-44570-6_8

Abstract

This paper explores the VIRAM architecture from the perspective of compiler writers, describing code-generation challenges and their solutions in the VIRAM compiler. It focuses on exploiting high on-chip bandwidth for memory-intensive applications, including non-contiguous and unpredictable access patterns, and on supporting the narrow data types common in media processing.

Materials

Bibtex

@inproceedings{2001exploitingonchipmemorybandwidthintheviramcompiler,
  title = {Exploiting On-chip Memory Bandwidth in the VIRAM Compiler},
  author = {David Judd and Katherine Yelick and Christos Kozyrakis and David Martin and David Patterson},
  booktitle = {International Workshop on Intelligent Memory Systems (IMS)},
  year = {2001},
  doi = {10.1007/3-540-44570-6_8},
}

Hi, we are the Stanford MAST team

Exploiting On-chip Memory Bandwidth in the VIRAM Compiler

Abstract

Materials

Bibtex